Plasma Dicing V - What's New for 2021? (5th May 2021)
As early adopters of plasma dicing begin to expand production capacity and many more manufacturers begin to invest in this approach, SPTS continues to develop the Mosaic family of plasma dicing systems providing solutions for high volume production across a number of device applications.
The benefits of plasma dicing that have been promoted in our previous webinars, such as the release of wafer real estate and higher die strengths, are being complemented by the ability of plasma to singulate wafers in a much cleaner fashion which is finding favour in the realm of hybrid bonding.
This webinar will give an overview of the latest plasma dicing developments from SPTS, including the launch of the Mosaic OHT platform, a follow-up on the management of fluorine left behind by the Si dicing etch as well as a general update on market and process trends.
Registration is required for this online event
Date : Wednesday 5th May 2021
Session 1: 08:00am UK (GMT) / 09:00am Europe / 15:00pm China & Taiwan / 16:00pm Korea
Repeat Session: 09:30am PDT / 12:30pm EDT / 17:30pm UK / 18:30pm Europe
N.B. The same content will be shared in both live broadcasts listed above to accommodate all time zones.
This webinar will be of interest to:
- Manufacturers and Developers of Si devices
- Process Engineers
- Product Managers
- Researchers
Presenter: Richard Barnett, Director, Etch Product Management
Richard Barnett is Director, Etch Product Management at SPTS, with over 20 years experience in a number of fields in the semiconductor industry.
In 2007, he joined what was then Aviza Technology, becoming a part of the etch product management team utilising his background in DRIE processing to help achieve a market-leading install base for that technology.
He is responsible for the management of SPTS’ Mosaic plasma dicing product line and has written and presented many papers about this disruptive new approach to die singulation.
Richard graduated from The University of Nottingham in the UK with a Bachelor’s degree in Materials Engineering and Electronics before entering the semiconductor industry. His roles have bridged the various parts of the supply chain, including fab process engineering, wafer supply, equipment vendor process engineer and product management.