• -
  • San Jose, Calforina
  • Double Tree by Hilton

 

SPTS Technologies are pleased to announce that we will be presenting at the International Wafer-Level Packaging Conference taking place at the Double Tree by Hilton in San Jose from 22 - 24 October 2019. 

Improved Semiconductor Device Reliability from Plasma Dicing
Richard Barnett, Senior Product Manager - Etch 
Wednesday 23rd October, 14:00pm  -  Session 13 WLP track

IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging and manufacturing.

For more information regarding the IWLPC conference please click here.

 

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